Read circuit for memory adapted to the measurement of leakage cu

Details Read circuit for memory adapted to the measurement of leakage cu Read circuit for memory adapted to the measurement of leakage cu

1998-02-27

1999-03-30

Dinh, Son T.

Static information storage and retrieval

Floating gate

Particular biasing

36518521, 365210, G11C 1606

Patent

active

058897020

ABSTRACT:
The circuit is for the measurement of the current of the memory cells of an electrically modifiable non-volatile memory. The read circuit is complemented by two current sources to improve the biasing of the current mirror of the read circuit during the measurement.

REFERENCES:
patent: 5267202 (1993-11-01), Dallabora et al.
patent: 5432764 (1995-07-01), Guedj
patent: 5530403 (1996-06-01), Bushman et al.
patent: 5544114 (1996-08-01), Gaultier et al.
patent: 5699295 (1997-12-01), Yero
patent: 5717640 (1998-02-01), Hashimoto
patent: 5729492 (1998-03-01), Campardo
Roberto Gastaldi, "A 1-Mbit CMOS EPROM with Enhanced Verification," IEEE Journal of Solid-State Circuits , vol. 23, No. 5, Oct. 1988.

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