Read amplifier for static memories in CMOS technology

Details Read amplifier for static memories in CMOS technology Read amplifier for static memories in CMOS technology

1988-07-08

1991-04-30

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Differential sensing

36518911, 365203, 307530, G11C 700

Patent

active

050124501

ABSTRACT:
A read amplifier formed of a load component (L), a differential amplifier component (DIFF), a compensation transistor (N6), a switching transistor (P1) connected between a supply voltage (V.sub.DD) and the load component (L). The pre-loading potential of the read amplifier at its outputs LA, LA is about 2.5 volts. During the pre-loading phase, the two supply voltages (V.sub.DD, V.sub.22 =ground) are disconnected and the pre-loading potential is established by compensation of capacitances at the outputs LA, LA which results in an improved read amplifier.

REFERENCES:
patent: 4031415 (1977-06-01), Redwine et al.
patent: 4508980 (1985-04-01), Puar
patent: 4511810 (1985-04-01), Yukawa
patent: 4697112 (1987-09-01), Ohtani et al.
patent: 4813022 (1989-03-01), Matsui et al.
IEEE Journal on Solid State Circuits, vol. SC 19, No. 5, Oct. 1984, pp. 545-551, A 16 ns 2k X 8 Bit Full CMOS SRAM by Okazaki et al.
IEEE Journal of Solid State Circuits, vol. SC-19, No. 5, Oct. 1984, pp. 552-556 by Childs et al. and Ryan Hirose.

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