Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-10-11
2005-10-11
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S154000, C711S170000
Reexamination Certificate
active
06954826
ABSTRACT:
A read allocation indicator (e.g. read allocation signal30) is provided to storage circuitry (e.g. cache22) to selectively determine whether read allocation will be performed for the read access. Read allocation may include modification of the information content of the cache (22) and/or modification of the read replacement algorithm state implemented by the read allocation circuitry (70) in cache (22). For certain types of debug operations, it may be very useful to provide a read allocation indicator that ensures that no unwanted modification are made to the storage circuitry during a read access. Yet other types of debug operations may want the storage circuitry to be modified in the standard manner when a read access occurs.
REFERENCES:
patent: 5471598 (1995-11-01), Quattromani et al.
patent: 5689679 (1997-11-01), Jouppi
patent: 6353829 (2002-03-01), Koblenz et al.
patent: 6496902 (2002-12-01), Faanes et al.
patent: 6665774 (2003-12-01), Faanes et al.
patent: 6684296 (2004-01-01), Hayler et al.
Chiu Joanna G.
Freescale Semiconductor Inc.
Hill Susan C.
Thai Tuan V.
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