Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
1996-03-14
2002-01-22
McDonald, Rodney G. (Department: 1753)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S192120, C204S192300, C204S192220, C204S298060, C204S298180, C204S298210, C204S298260, C204S298120, C204S292000
Reexamination Certificate
active
06340417
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a reactor for ionized metal deposition and to a method for forming an interconnection structure by ionized metal deposition. The invention has particular application in submicron integrated circuit manufacturing involving interconnection structures comprising contacts/vias with high aspect ratios.
BACKGROUND ART
The escalating requirements for high density and performance associated with ultra large scale integration semiconductor wiring require responsive changes in interconnection technology, which is considered one of the most demanding aspects of ultra large scale integration technology. As the design rule for integrated circuits decreases below 0.25 &mgr;m, it becomes increasingly more challenging to voidlessly fill through holes for contacts and vias of interconnection patterns employing conventional technology, particularly through holes having aspect ratios greater than 3:1.
Conventional magnetron sputtering techniques involving either direct current or radio frequency sputtering suffer from recognized drawbacks, notably the difficulty of achieving conformal coverage deep within the high aspect ratio steps of contacts or vias on semiconductor devices. Atoms are directed toward the wafer surface at varying angles and, hence, only a relatively small portion of the sputtered atoms arrive at the wafer surface at an angle substantially perpendicular to the wafer surface. As a result of the varying angles at which atoms strike the wafer, it is difficult to achieve a conformal coating deep within contacts and vias, particularly since the amount of perpendicularly angled atoms is small with respect to the non-perpendicularly angled atoms. As a result of such poorly directionalized fluxes of predominantly neutral atoms, contacts and vias having high aspect ratios inevitably contain voids.
A prior attempt to overcome such a drawback comprises the use of a collimator. See, for example, Joshi et al., “Collimated Sputtering of TiN/Ti Liners Into Sub-Half Micron High Aspect Ratio Contacts/Lines,” Proc. VMIC Conference, Jun. 9-10, 1992, pp. 253-259 and Sandhu et al., U.S. Pat. No. 5,409,587, wherein the use of a collimator is disclosed.
The use of a conventional collimator is illustrated in
FIG. 1
which is similar to FIG. 4 of Sandhu et al., wherein sputtering chamber
10
comprises wafer support
11
, target support
12
, target
13
and wafer
14
. Collimator
15
is positioned between target
13
and wafer
14
for filtering atoms sputtered from target
13
onto wafer
14
. The dislodged target atoms pass through openings
16
in collimator
15
and onto wafer
14
. Sputtering chambers containing collimators suffer from various disadvantages, including coating of the collimator and openings therein with dislodged target atoms.
A more recent approach in the evolution of high aspect ratio contact/via interconnection technology involves the ionization of sputtered metals by a high-density plasma. See S. M. Rossnagel et al., “Metal ion deposition from ionized mangetron sputtering discharge,” J. Vac. Sci. Technol. B 12(1), January/February 1994, pp. 449-453 and J. Hopwood et al., “Mechanisms for highly ionized magnetron sputtering,” J. Appl. Phys., Vol. 78, No. 2, Jul. 15, 1995, pp. 758-765. The ionization of sputtered metals is predicated upon conventional magnetron sputtering with the addition of a high density inductively coupled radio frequency (RF) plasma in the region between the sputtering cathode and wafer. The sputtered metal atoms are ionized and accelerated to the wafer by a low voltage bias such that metal ions arrive at a direction substantially perpendicular to the wafer surface. Ionization fractions have been achieved up to 85%. Thus, a high density plasma of highly ionized metal is produced and the directionality of the ionized plasma controlled by the application of a conventional RF or DC bias to the substrate.
There is, also, a recognized need to improve RF induced plasma processing by generating a greater percent of ionized sputtered material, i.e., density, increasing uniformity and improving directionality, particularly for fabricating interconnection patterns with contacts and vias having high aspect ratios. See Cuomo et al., U.S. Pat. No. 5,280,154, wherein this problem was addressed by providing a coil having a generally flattened surface defined by parallel conductors.
There exists a need for further advances in plasma processing to increase the uniformity, density and directionality of the generated plasma to enable voidlessly filling contacts/vias having a high aspect ratio.
DISCLOSURE OF THE INVENTION
An object of the present invention is a high density plasma sputtering apparatus capable of voidlessly filling through holes to form contacts and vias having high aspect ratios.
Another object of the present invention is a method of forming an interconnection pattern in a semiconductor device having contacts and vias with high aspect ratios.
Additional objects, advantages and other features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the invention. The objects and advantages of the invention may be realized and obtained as particularly pointed out in the appended claims.
According to the present invention, the foregoing and other objects are achieved in part by a plasma sputtering apparatus comprising: a chamber having an upper end, a lower end, and a vertical side surface connecting the upper and lower ends; a first wafer support located at the lower end of the chamber; a second wafer support located at the upper end of the chamber; a coil of conductive material disposed between the first and second wafer supports; a target support positioned between the vertical side surface and the coil; means for applying radio frequency energy to the coil; and means for applying a radio frequency or direct current bias to each wafer support.
Another aspect of the present invention is a method of forming an interconnection in a semiconductor device, which method comprises: providing a sputtering chamber having an upper end, a lower end and a vertical side surface connecting the upper and lower ends, a first wafer support located at the lower end of the chamber, a second wafer support located a the upper end of the chamber, a coil of conductive material disposed between the first and second wafer supports, a target support positioned between the vertical side surface and the coil, means for applying a radio frequency energy to the coil and means for applying radio frequency or direct current bias to each wafer support; mounting a target to the target support; mounting a wafer to each wafer support; applying a bias to each wafer support; and generating a high density plasma of target material ions which are directed toward the wafers substantially perpendicular to the surface of the wafers.
Additional objects and advantages of the present invention will become readily apparent to those having ordinary skill in the art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
REFERENCES:
patent: 4999096 (1991-03-01), Nihei et al.
patent: 5178739 (1993-01-01), Barnes et al.
patent: 5280154 (1994-01-01), Cuomo et al.
patent: 5409587 (1995-04-01), Sandhu et al.
patent: 5431799 (1995-07-01), Mosely et al.
patent: 61-190070 (1986-08-01), None
patent: 64-55379 (1989-03-01), None
Joshi et al., “Collimated Sputtering of TiN/Ti Liners Into Sub-Half Micron High Aspect Ratio Contacts/Liners,” P
Advanced Micro Devices , Inc.
McDonald Rodney G.
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