Reactive sputter faceting of silicon dioxide to enhance gap fill

Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering

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20419235, 20419237, 438697, 438699, C23C 1434, H01L 21465

Patent

active

060398515

ABSTRACT:
An embodiment of the present invention teaches a semiconductor device fabrication process for reducing bread-loafing of an insulative layer at the gaps between a plurality of patterned conductive lines, by sputter faceting an existing SiO.sub.2 layer overlying the patterned conductive lines by flowing in argon gas at a rate of approximately 50 sccm, with a reactive CF.sub.4 gas having a flow rate range of approximately 1-4 sccm, into a chamber having a chamber pressure set at approximately 30 mTorr that is equipped with a magnetic field set at approximately 60 Gauss.

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