Re-programmable finite state machine

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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C711S108000, C711S220000

Reexamination Certificate

active

10245436

ABSTRACT:
A re-programmable finite state machine comprising a content-addressable memory (“CAM”) and a read/write memory output array (“OA”). In operation, the CAM receives and periodically latches a status vector, and generates a match vector as a function of the status vector and a set of stored compare vectors. In response, the OA selects for output one of a set of a control vector as a function of the match vector. A state vector portion of the selected control vector is forwarded to the CAM as a portion of the status vector. An output vector portion of the selected control vector controls the operation of external components. Both the set of stored compare vectors and the set of control vectors are fully re-programmable.

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