Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-11-29
2004-07-20
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S680000
Reexamination Certificate
active
06764942
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a semiconductor process. More particularly, the present invention relates to a re-oxidation process of a semiconductor device that includes a polysilicon/tungsten suicide (WSi ) stacked structure.
2. Description of Related Art
In current MOS (metal-oxide-semiconductor) process, polycide gates having polysilicon/metal suicide stacked structures are frequently formed to lower the resistance. After polycide gates are formed by patterning/etching a metal silicide layer and a polysilicon layer deposited on a substrate, the substrate is usually subjected to a re-oxidation process to eliminate the damage caused by the deposition process and the etching process. For example, the re-oxidation process is capable of eliminating the damage in a gate oxide layer to recover the gate oxide integrity.
However, in a re-oxidation process performed after the etching process of polysilicon/tungsten suicide stacked gates, fast oxidation easily occurs on the surfaces of the polysilicon layer and the tungsten silicide layer to cause specific migration paths at the polysilicon/tungsten silicide interface. The underlying polysilicon is pumped-up through the migration paths, so voids are formed at the interface between the polysilicon layer and the tungsten silicide layer. Consequently, the resistance of the polycide gates are remarkably changed, and the device properties are not uniform.
Referring to
FIG. 3
, which shows a TEM image of a cross section of a polysilicon/tungsten suicide stacked gate after a re-oxidation process in the prior art. It is noted that a void is formed at the interface between the tungsten suicide (WSi) layer and the polysilicon (Poly) layer.
SUMMARY OF INVENTION
Accordingly, this invention provides a re-oxidation process of a semiconductor device that includes a polysilicon/tungsten silicide stacked structure. With the re-oxidation process of this invention, void formation at the polysilicon/tungsten silicide interface can be effectively prevented.
The re-oxidation process of a semiconductor device of this invention is briefly described below. A substrate having a stacked structure thereon is provided, wherein the stacked structure includes a polysilicon/tungsten silicide interface. A thin CVD oxide layer is formed on the substrate and the stacked structure with a chemical vapor deposition (CVD) process, such as a low-pressure chemical vapor deposition (LPCVD) process or a plasma-enhanced chemical vapor deposition (PECVD) process, using silane (SiH
4
), TEOS (tetraethyl-ortho-silane) or dichlorosilane (SiH
2
C12) as a Si-source. Then, an oxidation process is performed to form a thermal oxide layer on the substrate and the stacked structure.
Based on the aforementioned re-oxidation process, this invention also provides a method for fabricating a semiconductor device that includes a polysilicon/tungsten suicide stacked gate. In the method, a tunneling layer, a first polysilicon layer, an inter-poly dielectric layer, a second polysilicon layer and a tungsten silicide layer are sequentially formed on a substrate. The above layers are then patterned sequentially to form a stacked gate that comprises a tunneling layer, a polysilicon floating gate, an inter-poly dielectric layer, a polysilicon control gate and a tungsten silicide layer. A thin CVD oxide layer is formed on the substrate and the stacked gate with a chemical vapor deposition (CVD) process. Thereafter, an oxidation process is performed to form a thermal oxide layer on the substrate and the stacked gate.
This invention further provides another method for fabricating a semiconductor device that includes a polysilicon/tungsten silicide stacked gate. In the method, a gate dielectric layer, a polysilicon layer and a tungsten silicide layer are sequentially formed on a substrate. The above layers are then patterned sequentially to form a stacked gate, wherein the polysilicon layer is patterned into a polysilicon gate. Thereafter, the substrate is subjected to the aforementioned re-oxidation process of this invention.
In this invention, the thin CVD oxide layer can prevent fast oxidation on exposed surfaces of the tungsten silicide layer and the polysilicon layer, so pumping-up paths for underlying polysilicon are not created. Therefore, void formation at the polysilicon/tungsten silicide interface can be prevented effectively.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6124153 (2000-09-01), Lee et al.
patent: 6136666 (2000-10-01), So
patent: 6486067 (2002-11-01), Shen et al.
patent: 6515328 (2003-02-01), Yang et al.
Tu Jui-Neng
Yao June-Min
Dang Phuc T.
Jiang Chyun IP Office
Macronix International Co. Ltd.
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