Ratioed logic circuits with contention interrupt

Details Ratioed logic circuits with contention interrupt Ratioed logic circuits with contention interrupt

2007-01-09

2007-01-09

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S114000

Reexamination Certificate

active

10881891

ABSTRACT:
A ratioed logic gate includes a contention interrupt circuit. The ratioed logic gate includes a pull up network coupled to a pull down network. Multiple inputs are coupled to turn the pull down and pull up networks on and off. An output is coupled to apply a logical function on the multiple inputs. A contention interrupt circuit is coupled to one of the pull up and the pull down networks to open circuit the one of the pull up and pull down networks when the pull up and pull down networks are in contention.

REFERENCES:
patent: 5748012 (1998-05-01), Beakes et al.
patent: 6087855 (2000-07-01), Frederick et al.
patent: 6617892 (2003-09-01), Krishnamurthy et al.
Rabaey, Jan M., “Digital Integrated Circuits: A Design Perspective,”Prentice Hall Electronics and VLSI Series, index (xiv), pp. 202-210, 1996, Prentice-Hall, Inc., no month.

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