Electrical computers and digital processing systems: processing – Processing control – Logic operation instruction processing
Patent
1997-10-28
1999-11-30
Ellis, Richard L.
Electrical computers and digital processing systems: processing
Processing control
Logic operation instruction processing
712224, G06F 9302
Patent
active
059960671
ABSTRACT:
A enable circuit (700), employing a "circular carry lookahead" technique to increase its speed performance, is provided for applying two pointers to a circular buffer--an enabling pointer (tail <3:0> (218)) and a disabling pointer (head <3:0> (216))--and for generating a multiple-bit enable, ENA (722) in accordance with the pointer values. The pointers designate enable bit boundaries for isolating enable bits of one logic level from enable bits of an opposite logic level. The enable circuit includes several lookahead cells (702, 704, 706 and 708) arranged in an hierarchical array, each of the cells including bits that continue the hierarchical significance. Each cell receives an hierarchical portion of the enabling pointer 218 and the disabling pointer head <3:0> and a carry. From these pointers, the cell derives a generate, a propagate and the enable bits with a corresponding hierarchical significance. The propagates, generates and carries for all of the lookahead cells are interconnected using a circular propagate carry circuit (710) that provides for asserting a carry to a lookahead cell unless an intervening cell having a nonasserted propagate is interposed in the order of hierarchical significance between the cell and a cell in which enablement is generated.
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Advanced Micro Devices , Inc.
Ellis Richard L.
Koestner Ken J.
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