Random cache line refill

Details Random cache line refill Random cache line refill

2007-12-18

2007-12-18

Moazzami, Nasser (Department: 2136)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S129000, C711S126000, C713S173000

Reexamination Certificate

active

10141926

ABSTRACT:
A microprocessor includes random cache line refill ordering to lessen side channel leakage in a cache line and thus thwart cryptanalysis attacks such as timing attacks, power analysis attacks, and probe attacks. A random sequence generator is used to randomize the order in which memory locations are read when filling a cache line.

REFERENCES:
patent: 3866183 (1975-02-01), Lange
patent: 4056845 (1977-11-01), Churchill, Jr.
patent: 4084230 (1978-04-01), Matick
patent: 4400774 (1983-08-01), Toy
patent: 4493026 (1985-01-01), Olnowich
patent: 4527232 (1985-07-01), Bechtolsheim
patent: 4532587 (1985-07-01), Roskell et al.
patent: 4587610 (1986-05-01), Rodman
patent: 4646233 (1987-02-01), Weatherford et al.
patent: 4677546 (1987-06-01), Freeman et al.
patent: 4794524 (1988-12-01), Carberry et al.
patent: 4814981 (1989-03-01), Rubinfeld
patent: 4847758 (1989-07-01), Olson et al.
patent: 4882673 (1989-11-01), Witt
patent: 4949252 (1990-08-01), Hauge
patent: 4953073 (1990-08-01), Moussouris et al.
patent: 4954944 (1990-09-01), Ikeda
patent: 4959777 (1990-09-01), Holman, Jr.
patent: 4972338 (1990-11-01), Crawford et al.
patent: 4989140 (1991-01-01), Nishimukai et al.
patent: 5014195 (1991-05-01), Farrell et al.
patent: 5034885 (1991-07-01), Matoba et al.
patent: 5067078 (1991-11-01), Talgam et al.
patent: 5095424 (1992-03-01), Woffinden et al.
patent: 5146582 (1992-09-01), Begun
patent: 5148536 (1992-09-01), Witek et al.
patent: 5148538 (1992-09-01), Celtruda et al.
patent: 5168560 (1992-12-01), Robinson et al.
patent: 5175859 (1992-12-01), Miller et al.
patent: 5179679 (1993-01-01), Shoemaker
patent: 5179709 (1993-01-01), Bailey et al.
patent: 5210842 (1993-05-01), Sood
patent: 5226150 (1993-07-01), Callander et al.
patent: 5361391 (1994-11-01), Westberg
patent: 5937429 (1999-08-01), Kumar et al.
patent: 6081873 (2000-06-01), Hetherington et al.
patent: 6324632 (2001-11-01), McIntosh-Smith
patent: 6338124 (2002-01-01), Arimilli et al.
patent: 6385697 (2002-05-01), Miyazaki
patent: 6490655 (2002-12-01), Kershaw
patent: 2001/0001873 (2001-05-01), Wickeraad et al.
Kaplan et al., “Cache-Based Computer Systems,”Computer, pp. 30-36; 9Mar. 1973).
Rhodes et al., “Cache-Memory Functions Surface on VLSI Chip,”Design, pp. 159-163, Reprinted fromElectronic Design(Feb. 1982).
Rhodes, “Cached Keep Main Memories from Slowing Down Fat CPUs,” Reprinted fromElectronic Design, pp. 179-184 (Jan. 21, 1982).
Strecker, “Cache Memories for PDP-11 Family Computers,” Computer Engineering A DEC View of Hardware Systems Design, Digital Press, pp. 263-267 (1978).
Cushman, “Enhanced μPs Bring New Life to Old Devices,”Electrical Design News, pp. 124-138 (Jan. 1985).
VanAken, “Match Cache Architecture to the Computer System,” Reprinted fromElectronic Design, pp. 93-98 (Mar. 1982).
Brandt et al., “High Speed Buffer with Dual Directories,”IBM Technical Disclosure Bulletin, 26(12):6264 (May 1984).
Sachs et al., “A High Performance 846,000 Transistor Unix Engine-The Fairchild Cliper™,” Proceedings of IEEE Intl. Conference on Computer Design, pp. 342-346 (Oct. 1985).
Goodman, “Using Cache Memory to Reduce Processor-Memory Traffic,”Proc. of the 10thAnn. Intl. Symposium on Computer Architecture, pp. 124-131 (Jun. 1983).
Smith et al., “A Study of Instruction Cache Organizations and Replacement Policies,”Proceeding of 10thAnnual International Symposium on Computer Architecture, pp. 132-137 (Jun. 1983).
Strecker, “Cache Memories for PDP-11 Family Computers,”Proceedings of 3rdAnnual Symposium on Computer Architecture, pp. 155-158 (Jan. 1976).
“Dual Buses, Cache and Floating-Point Match Lift 32-bit Chip Set to 5 MIPS,”Electronic Design, pp. 41-42 (Oct. 3, 1985).
“An Introduction to Cache Memory Systems and the TMS2150”,Texas Instruments Applications Briefs, pp. 1-8 (Sep. 1982).
“TMS2150 Cache Address Comparator.” Texas Instruments Production Data document, pp. 1-8 (Mar. 1982 - revised Sep. 1985).

Affiliated with

Also associated with

Rating

Random cache line refill does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Random cache line refill, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Random cache line refill will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3896202