Random access memory word line select circuit having rapid dynam

Details Random access memory word line select circuit having rapid dynam Random access memory word line select circuit having rapid dynam

1996-08-02

1998-07-14

Dinh, Son T.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518911, 365203, G11C 800

Patent

active

057814970

ABSTRACT:
A word line select circuit (10) having a rapid de-select operation is disclosed. A group of word lines (12a-12d) is selected in response to a row address and the initial edge of a timing signal (i/RAS) by pulling a group select node (24) to a low power supply voltage (Vss). A particular word line is selected by coupling one of the word line input driver nodes (16a-16d) to the group select node (24). The selected word line is driven to a pump voltage (Vpp) that is greater than the positive supply voltage (Vcc) by a word line driver circuit. Word lines are de-selected on the terminal edge of the i/RAS signal by simultaneously activating de-select transistors (18a-18d) coupled between each input driver node (16a-16d) and Vpp. In the preferred embodiment, the de-select operation also pre-charges the group select node (24) to Vcc-Vtn.

REFERENCES:
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patent: 5412331 (1995-05-01), Jun et al.
patent: 5490119 (1996-02-01), Sakurai et al.
patent: 5602796 (1997-02-01), Sugio

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