Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1991-05-08
1994-01-25
Mottola, Steven
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, G11C 700
Patent
active
052821650
ABSTRACT:
A random access memory includes a redundancy repair circuit having a plurality of parallel connected transistors and a plurality of fuses connected to respective drains of the plurality of transistors. An electrically resistive element is connected to a common node to reduce a difference in operating speeds between a first case in which the circuit is precharged from a state in which discharge to a low level was effected via one of the transistors and a case in which precharging of the circuit is effected from a state in which discharging was carried out via a plurality of the transistors.
REFERENCES:
patent: 4734889 (1988-03-01), Mashiko et al.
Miyake Naomi
Sumi Tatsumi
Matsushita Electric - Industrial Co., Ltd.
Mottola Steven
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