Random access memory with reduced access time in reading operati

Static information storage and retrieval – Read/write circuit – Differential sensing

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365149, 307530, G11C 1134

Patent

active

049842064

ABSTRACT:
A dynamic random access memory comprises a pair of write-in data transferring lines (IL, IL), a pair of read-out data transferring lines (OL, OL) and a current-mirror type sense amplifier comprising (30) CMOS transistors. The current-mirror type amplifier (30) is connected between a plurality of bit line pairs (BL, BL) and the pair of read-out data transferring lines (OL, OL). At the time of data reading, the pair of write-in data transferring lines (IL, IL) is connected to the corresponding bit line pair (BL, BL) in response to a write-in column decoded signal (YW) obtained by ANDing a column decoded signal (CA) with a write-in instruction signal (W).

REFERENCES:
patent: 4653029 (1987-03-01), Sato
patent: 4697112 (1987-09-01), Ohtani et al.

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