Random access memory immune to single event upset using a T-resi

Details Random access memory immune to single event upset using a T-resi Random access memory immune to single event upset using a T-resi

1987-10-28

1989-02-28

Moffitt, James W.

Static information storage and retrieval

Systems using particular element

Flip-flop

G11C 1140

Patent

active

048092266

ABSTRACT:
In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.

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