Random access memory having fast column access

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S230030

Reexamination Certificate

active

07082049

ABSTRACT:
A memory comprises a column decoder and a circuit. The circuit is configured to receive a column address strobe signal, a column active signal, and a column addresses signal. The circuit is configured to pass the column addresses signal to the column decoder if the column address strobe signal and the column active signal are at a first logic level, and latch the column addresses signal and pass the latched column addresses signal to the column decoder if one of the column address strobe signal and the column active signal are at a second logic level different from the first logic level.

REFERENCES:
patent: 4764901 (1988-08-01), Sakurai et al.
patent: 5544124 (1996-08-01), Zager et al.
patent: 5636174 (1997-06-01), Rao
patent: 5754838 (1998-05-01), Shibata et al.
patent: 6151269 (2000-11-01), Dosaka et al.
patent: 6785187 (2004-08-01), Fujimoto et al.

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