Random access memory device utilizing a vertically oriented...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000

Reexamination Certificate

active

10637557

ABSTRACT:
A memory structure has a vertically oriented access transistor with an annular gate region. A transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely surrounds the channel. A buried annular bitline may also be implemented. After the vertically oriented transistor is fabricated with the annular gate, a storage device may be fabricated over the transistor to provide a memory cell.

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J.A. Mandelman et al., “Challenges and future directions for the scaling of dynamic rand-access memory (DRAM),” © IBM 0018-8646, 2002, 26 pages.

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