Static information storage and retrieval – Read/write circuit – For complementary information
Patent
1984-01-06
1985-08-20
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
For complementary information
365155, G11C 700
Patent
active
045368600
ABSTRACT:
The random access memory device of the present invention provides the memory cell array arranged in the form of a matrix. The plurality of memory cells have cross-connected flip-flop circuits. Word driver transistors are provided corresponding to a plurality of word lines, wherein the collector is connected to a high power supply voltage while the emitter is connected to the word line. Moreover, the base of the word driver transistor is connected respectively in common to a selected word line level switching circuit via diodes. The selected word line level switching circuit supplies a current during the write operation to the common connecting point of diodes and forms a current switch together with the diodes. Thus, the voltage of a selected word line is lower than that during the read operation. The present invention provides a random access memory device which has a simplified structure, consumes less current and assures a high speed read operation.
REFERENCES:
patent: 3986178 (1976-10-01), McElroy et al.
patent: 4348747 (1982-09-01), Takahashi
Shimada Haruo
Toyoda Kazuhiro
Fujitsu Limited
Popek Joseph A.
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