Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1976-06-29
1978-01-24
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Data refresh
307238, 365148, 365177, 365178, G11C 1140
Patent
active
040706532
ABSTRACT:
A self-refresh MOS RAM cell uses a resistor element made by an ion implant step compatable with a self-aligned N-channel silicon-gate process. The resistor element is beneath the field oxide in the finished device, although the implant step is prior to formation of the thick oxide. The cell employs two transistors and a gated capacitor, connected in a manner such that a stored "1" switches the implanted resistor to a high impedance state, while a stored "0" maintains the resistor in a relatively low resistance state.
REFERENCES:
patent: 3693170 (1972-09-01), Ellis et al.
patent: 3706891 (1972-12-01), Donofrio et al.
patent: 3876993 (1975-04-01), Cavanaugh
patent: 3955181 (1976-05-01), Raymond, Jr.
P. Pleshko, "Low-Power Flip-Flop," Oct. 1966, pp. 553-554, IBM Technical Disclosure Bulletin, vol. 9, No. 5.
McElroy David J.
Mohan Rao G. R.
Rogers Gerald R.
Comfort James T.
Graham John G.
Hecker Stuart N.
McElheny Donald
Texas Instruments Incorporated
LandOfFree
Random access memory cell with ion implanted resistor element does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Random access memory cell with ion implanted resistor element, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Random access memory cell with ion implanted resistor element will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-490658