Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-05-23
1995-07-18
Limanek, Robert P.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257906, 365149, 365210, H01L 27108, H01L 2978
Patent
active
054344387
ABSTRACT:
An N-channel MOS random access memory of the one transistor type is disclosed. The cell utilizes an ion implanted area beneath the capacitor dielectric to permit lower bias voltages on the capacitor. In one example, two levels of polycrystalline silicon are used, one for the bias voltage side of the storage capacitor, and the other for the gate of the MOS transistor and to connect the gate to the bit select line. The capacitor dielectric may be formed of thermal SiO.sub.2 which is about half as thick as the gate insulator of the MOS transistor in the cell. In another example, a single-level poly cell uses an implanted region for the same purpose; the capacitor dielectric is the same thickness as the MOS gate insulator so the lower bias voltage functions to reduce stress failures of the dielectric.
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Bassuk Lawrence J.
Hardy David
Havill Richard B.
Limanek Robert P.
Lindgren John C.
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