Random access memory cell of reduced size and complexity

Details Random access memory cell of reduced size and complexity Random access memory cell of reduced size and complexity

2007-11-27

2007-11-27

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189011, C365S189020

Reexamination Certificate

active

11155012

ABSTRACT:
A memory cell (1), includes a flip-flop (2) that has additional read/write terminals; a 1-bit write line (wb11); a first transistor (T4) switching between the 1-bit write line and the terminal, its gate being connected to a word selection line (W11); a 0-bit write line (wb10); a second transistor (T3) switching between the 0-bit write line and the terminal, its gate being connected to a word selection line (W12); a bit read line (b1r); and read transistors (T1, T2), with one of their gates being connected to a read/write terminal and the other being connected to a word selection line.

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