Static information storage and retrieval – Systems using particular element – Capacitors
Patent
1982-06-30
1985-01-08
Hecker, Stuart N.
Static information storage and retrieval
Systems using particular element
Capacitors
357 41, 357 45, G11C 1124, G11C 1140
Patent
active
044930569
ABSTRACT:
An integrated circuit electronic memory array having a plurality of FET memory cells arranged in rows and columns and formed on the same integrated circuit chip with associated support circuits. Each memory cell of the array has a capacitive storage region, an adjacent channel region, and a gate region for controlling the transfer of binary information through the channel region into and out of the capacitive storage region. Each memory cell also includes an offset contact region which contacts an adjacent bit line. The word lines are arranged in rows and the bit lines are arranged in columns, complementary pairs of bit lines being electrically connected to alternate ones of memory cells along each column. A bit line to diffusion capacitance couples each memory cell to the one of the pair of bit lines to which it is electrically not connected. This capacitance boosts the electrical signal written into and read out from the storage capacitor. Also disclosed is a memory array in which a single sense amplifier and dummy cell arrangement placed near the middle of each column of cells selectively accesses either half of the column.
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IBM-TDB, vol. 24, No. 10, Mar. 1982, pp. 5165-5166, "Dummy Word Decoder", R. S. Mao et al.
Galanthay Theodore E.
Gossage Glenn
Hecker Stuart N.
International Business Machines - Corporation
Jordan John A.
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