Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
1998-03-11
2001-01-09
Chin, Stephen (Department: 2734)
Pulse or digital communications
Spread spectrum
Direct sequence
C370S342000
Reexamination Certificate
active
06173008
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a code division multiple access (CDMA) communication technique used in a cellular radio telephone communication system and, more particularly, to a RAKE receiver for correlating a received signal sample with a despreading code sequence to determine a received data sequence.
2. Description of the Related Art
In a spread spectrum system, if a spread spectrum signal passes through a multipath fading channel, a received signal appears in a form resulting from adding components of the signal traveling over multiple paths, each having a different amplitude and phase relative to the other components of the signal. With respect to power efficiency, it is not preferable, in this case, to receive only the one main path signal having the strongest power, since power components of the other multipath signals are lost.
In a RAKE receiver, a plurality of receivers arranged in a parallel fashion are used, as shown in
FIG. 1
, to unitedly perform demodulation without losing the power of components of the multipath signals. Signals output from the receivers are combined through a combiner
16
.
FIG. 1
is a conceptual diagram described in the book “SYNCHRONOUS DIGITAL COMMUNICATION”, pp.353-354, Jul. 20, 1995 by KYOHAKSA, Inc. The time interval between multipath receivers is variable, and the multipath power component is demodulated with a delay time &tgr;
i
through a tapped delay line (TDL)
10
, despreader
12
, and demodulator
14
. The delay time &tgr;
i
is dynamically adjusted by a control circuit (not shown). Such a construction maximizes the SNR (Signal-to-Noise Ratio) of the signal output from the RAKE receiver.
In a RAKE receiver, a rake is a logical unit including, for example, a transformer, combiner, etc. In order to receive the signals having respectively different path delays in the receiver, the rake performs its operation in the despreader process by setting the delay offset of the sample signals input to a correlator (despreader) to different delay values. A rake can be classified as either a finger or a searcher. A finger is a receipt rake for receiving and combining a plurality of multipath fading signals, and a searcher is a receipt rake for searching the signals' positions on the time base for the multipath fading signals.
Although the RAKE receiver is very good at efficiently using the signal power, there is a limit to the number of parallel circuits which can be employed, since many additional hardware circuits are required. The RAKE receiver is based on the principle that if the spectrum width of a signal at a frequency selective fading channel is greater than a delay spread value, it is possible to classify the signal components into independently faded components according to several spectrums. If the number of parallel hardware circuits is greater than the number of actual paths of the signal, the performance of the RAKE receiver is degraded. If the power strength of the signal components traveling on paths between the actual paths are similar to or equal to each other, then the RAKE receiver exhibits maximum performance.
Meanwhile, U.S. Pat. No. 5,237,586, issued on Aug. 17, 1993, entitled “RAKE RECEIVER WITH SELECTIVE RAY COMBINING”, which is incorporated by reference herein, describes a RAKE receiver including multipliers for multiplying outputs of a fast Walsh transformer by a weight, accumulators for accumulating outputs of the multipliers and a decision device for detecting a received code word based on the outputs of the accumulators. In operation, a descrambler descrambles (or despreads) a received sample. A single correlator calculates result values corresponding to each Walsh index by using a FWT (Fast Walsh Transform). The multipliers multiply the result values by complex weights, and the accumulators accumulate the outputs of the multipliers. The accumulated values are supplied to the decision device. The decision device sequentially sorts the accumulated values and determines the Walsh index having the maximum value as the received code word.
However, since the RAKE receiver disclosed in the aforementioned U.S. Pat. No. 5,237,586 uses an additional accumulator with respect to each Walsh index, many hardware circuits are needed. Also, since the decision device generates only the Walsh index having the maximum value, the above-described RAKE receiver leaves much to be desired in terms of search performance, where a search is an operation for determining a signal component, that is, a pseudo noise phase component, to be demodulated by demodulator fingers within the RAKE receiver.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a RAKE receiver for reducing the amount of needed of hardware without deteriorating processing performance.
It is another object of the invention to provide a RAKE receiver for reducing the amount of hardware and improving search performance without deteriorating processing performance.
It is still another object of the invention to provide a method for operating a RAKE receiver which results in reducing the amount of hardware needed in the RAKE receiver without deteriorating processing performance.
It is yet another object of the invention to provide a method for operating a RAKE receiver with a reduced amount of hardware while improving search performance without deteriorating processing performance.
In one aspect of the invention, a RAKE receiver for receiving a data signal transmitted from a transmitter in a spread spectrum communication system includes: a symbol combiner having an adder for adding output values of Walsh indexes which are sequentially generated from a correlator using a fast Walsh transform algorithm according to N Walsh code sequences, to a value generated from a last stage of an N-stage shift register, and having the N-stage shift register for shifting an accumulated value of an output of the RAKE receiver corresponding to each index of a Walsh symbol generated from the adder each time a rake is assigned to each finger; a first decision logic unit for determining a maximum value by sequentially sorting an output of the symbol combiner and generating a Walsh index corresponding to the determined maximum value as a code word; and a second decision logic unit for sorting and subtracting the output of the symbol combiner according to a state of each bit of a corresponding index and generating a probability value of the code word.
REFERENCES:
patent: 5237586 (1993-08-01), Bottomley
patent: 5530716 (1996-06-01), Lipa
patent: 5784293 (1998-07-01), Lipa
“Synchronous Digital Communication”, pp. 353-354, Jul. 20, 1995 by Kyohaksa Inc.
Chin Stephen
Deppe Betsy L.
Samsung Electronics Co,. Ltd.
Sughrue Mion Zinn Macpeak & Seas, PLLC
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