Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-06-07
2005-06-07
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S154000
Reexamination Certificate
active
06904498
ABSTRACT:
A RAID disk array controller [(FIG.7)] implements a write mask16to support partial-stripe updates [(FIG.4)] from a host system [60] without expensive RAM to RAM copying and repeated disk accesses to assemble the updated stripe. New data from the host [20,22] is transferred into a single buffer [14,40] and a local processor [80] tracks—by setting bits [30,32] in the write mask—which segments of the target stripe are updated. The disk array is accessed to transfer the target stripe into the same buffer [40], but the buffer memory write enable [58] is inhibited—responsive to the write mask [52]—during transfer of the segments that were updated by the host. The complete, updated stripe is thus formed in a single buffer for parity calculations and write to the disk array.
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NetCell Corporation brochure entitled, “TurboDisk™ Storage Switch,” Copyright NetCell Corporation 2001.
Kim Matthew
NetCell Corp.
Patel Hetul
Stoel Rives LLP
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