Radiation hard memory cell circuit with high inverter impedance

Details Radiation hard memory cell circuit with high inverter impedance Radiation hard memory cell circuit with high inverter impedance

1986-09-05

1988-07-26

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365190, 307279, G11C 502, G11C 1134, G11C 1140

Patent

active

047605570

ABSTRACT:
A memory cell circuit has a pair of cross-coupled inverters. One inverter has an output impedance at least 10 times, preferably, at least 50 times, that of the other inverter so that during a radiation pulse the chance of a change in logic state is reduced. In a particular embodiment, the one inverter has an output impedance of 135 times that of the other inverter.

REFERENCES:
patent: 3493786 (1970-02-01), Ahrons et al.
patent: 3656010 (1972-04-01), Huyben et al.
patent: 3990056 (1976-11-01), Luisi et al.
patent: 4063225 (1977-12-01), Stewart
patent: 4130892 (1978-12-01), Gunckel, II et al.
patent: 4149268 (1979-04-01), Waters
patent: 4590508 (1986-05-01), Hirakawa et al.
Herbert et al. "SOS Test Structures for Measurement of Photocurrent Sources and Upset Dose Rates in Memories", DNA/Aerospace Corp. Workshop on Test Structures for Radiation Hardening and Hardness Assurance, Feb. 19, 1986.
State Retention RAM by Allen et al. RCA publication from Abstracts for the Space Electronics Conference of Sep. 1986.

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