Race condition detection and expression

Details Race condition detection and expression Race condition detection and expression

2006-03-21

2006-03-21

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07017129

ABSTRACT:
A method and apparatus for improved race detection and expression is disclosed. The race detection method and apparatus disclosed herein detects races statically by analyzing the circuits, which are usually written in a hardware description language (HDL), such as VHDL or Verilog. Compared with known simulation approaches, the inventive method and apparatus has at least the following advantages: no test vectors are required; all potential races can be detected; and in simulator approaches, if the right test vectors are not provided, then the races cannot be found (the invention avoids this last constraint).

REFERENCES:
patent: 5608645 (1997-03-01), Spyrou
patent: 5648909 (1997-07-01), Biro et al.
patent: 6430731 (2002-08-01), Lee et al.
patent: 6601221 (2003-07-01), Fairbanks
Fisher et al, “Race-Free State Assignments for Synthesizing Large-Scale Asynchronous Sequential Logic Circuits”, IEEE 1993.
Goering, “SureFire reveals new verification approach”, EE Times, Dec. 7, 1998.

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