Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
2000-02-23
2001-12-11
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S056000
Reexamination Certificate
active
06329835
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to CMOS output buffers, and more particularly to disabling neighboring output drivers to reduce noise.
BACKGROUND OF THE INVENTION
Complementary metal-oxide-semiconductor (CMOS) circuits are in widespread use today. Higher-performance systems require increased speed and current requirements for their output buffers. Higher current drive increases speed because load capacitances are more quickly charged or discharged. Unfortunately, unwanted noise often increases too.
CMOS chips with higher-drive output buffers often produce a type of noise known as ground bounce, due to rapid changes in current through the parasitic inductances of the integrated circuit (IC) package. These inductances resist changes in current by changing the voltages on power or ground supplies. Such voltage changes can falsely trigger logic within the IC device, or other devices in the system.
The rate of voltage change of the output, the edge rate, increases for these faster devices. The high edge rate can reflect off the ends of printed-circuit-board (PCB) wiring traces driven by the output buffer. These reflections produce voltage variations known as undershoot, overshoot, and ringing (oscillation). Careful layout of these wiring traces is needed to minimize trace-ends that can cause reflections. Termination devices such as resistors to ground at the ends of the traces are often used to absorb the reflect ion-causing wave front produced by the high edge rate.
FIG. 1
is a diagram of a waveform of a prior-art high-drive output buffer driving a PCB wiring trace. The high current drive of the output buffer produces a high edge rate that rapidly changes the output voltage from ground to the power-supply voltage, Vcc. The high edge rate produces a wave front that travels down the wiring trace and reflects off one or more ends. The reflected wave front then travels back up the wiring trace to the output buffer, and raises the voltage at the output buffer when the reflected wave arrives. The raised voltage is above Vcc and is known as an overshoot. This reflected wave then reverses direction and travels back to the end of the wiring trace, is reflected, and again reaches the output buffer, producing a series of both overshoots and undershoots, known as ringing. Since the reflected wave is dampened and loses energy at each reflection, the amplitude of the ringing gradually decreases. Low-going ringing (undershoot) is caused by a mis-match in impedance. Multiple reflections interfere with each other and cause the ringing.
When the output buffer switches from high to low, another high-edge rate wave travels down the wiring trace and is reflected back, producing undershoot and more ringing. This undershoot can cause ground bounce inside the output buffer's IC.
When the ringing and over/undershoot is large, logic can read a static signal as low when the static signal is actually high. For example, a static 3-volt signal input to another pin of the IC is a high signal, but when the internal ground of the IC bounces up from 0 volt to 2 volt, the static 3-volt signal appears to be a 1-volt signal, a low input. When the input signal is connected to a latch or flip-flop, the false low can be latched in, causing an error. Thus noise is a serious problem.
Several prior-art solutions to these problems are known. For example, Pierce et al., U.S. Pat. No. 5,319,252, assigned to Xilinx Inc. of San Jose, Calif., discloses an output buffer which gradually turns output buffers on and off so that there is no sharp discontinuity in the current flow. The output voltage is fed back to gradually turn off the output buffer at the end of the voltage transition. Lipp in U.S. Pat. No. 5,347,177, discloses a closed-loop trace which is driven by output buffers with level-sensitive impedance control.
While these methods are useful for controlling noise from a single output buffer, often many output buffers switch simultaneously. Simultaneous switching produces severe noise conditions and is often the worst-case. For example, if 6 of 8 outputs change at the same time, the noise from the 6 changing outputs may couple into the remaining 2 outputs, upsetting these outputs.
A solution to this problem is disclosed by Kwong et al. in U.S. Pat. No. 5,963,047, assigned to Pericom Semiconductor of San Jose, Calif. When one or more outputs change state, a short pulse is generated. The pulse is sent to other neighboring output buffers which may not be switching. The pulse temporarily disables the large drivers in these other buffers while the outputs change. Noise is reduced since the other outputs are disabled during the pulse. This solution is known as “neighbor sensing”.
Schematic of Pulse-Disabled Output Buffer
FIG. 2
is a schematic diagram of a prior-art output buffer that disables the larger driver transistor using a pulse generator. The circuit diagrammed in
FIG. 2
generates the waveform of FIG.
4
and was disclosed by Kwong et al. in U.S. Pat. No. 5,963,047.
An internal input signal DIN is buffered by inverter
54
, which drives NOR gate
42
and NAND gate
40
. An output enable OE signal is also input to NAND gate
40
. Inverter
52
inverts OE for input to NOR gate
42
. When OE is low, output buffer
30
is disabled and does not drive output pin
10
.
NOR gate
42
drives n-channel pull-up transistor
32
, which drives DOUT output pin
10
high when DIN is high and OE is high. Only one pull-up is provided because power-supply ringing is not as problematic as is ground bounce. However, two pull-down drivers are used: large driver transistor
36
and small driver transistor
34
.
Output pin
10
is driven by the drain of large driver transistor
36
and by the drain of smaller driver transistor
34
through resistor
38
. During and immediately after the later part of the voltage transition, when ringing occurs, large driver transistor
36
is disabled so that only small driver transistor
34
is enabled. Only small driver transistor
34
continues to drive the output low until ground is reached. Resistor
38
increases the output impedance, helping to absorb reflections.
Small driver transistor
34
thus acts as a dynamic driver transistor, being used during voltage slewing, while larger driver transistor
36
is used as a static driver to supply a large D.C. current sink after the output voltage has completed its swing.
The output from NAND gate
40
is inverted by inverter
44
and drives the gate of small driver transistor
34
. The output of NAND gate
40
is also input to NOR gate
46
, which drives the gate of large driver transistor
36
.
Large driver transistor
36
is pulsed off by a pulse generated by input-transition detector
50
. When input DIN changes from high to low, detector
50
generates a pulse DP. This pulse DP is a high-going pulse. The high-going DP pulse is input to NOR gate
46
and temporarily disabled large driver transistor
36
.
Other neighboring output buffers (not shown) similar to output buffer
30
also receive the DP pulse from detector
50
. These other output buffers also have large driver transistors that are pulsed off when DIN changes. The DIN inputs to these other output buffers are also received by detector
50
. Any low-going transition of any DIN for any neighboring pin generates the DP pulse and disables large driver transistors for all neighboring outputs.
Resistor
38
is in series with the output and thus serves to increase the output impedance. The higher output impedance helps dampen reflected waves and reduce ringing. Resistor
38
is sized to provide a matching impedance to the characteristic impedance of the wiring trace attached to output pin
10
.
Neighbor Sensing—
FIG. 3
FIG. 3
illustrates a group of neighboring output buffers that generate disabling pulses for all outputs when any output is driven low. Each output pin is driven by its own output buffer
30
, which includes pull-up transistor
32
, resistor
38
, and small driver transistor
34
as shown in detail in FIG.
2
. Other components of
FIG. 2
are deleted for clarity. Larg
Auvinen Stuart T.
Cho James H.
Pericom Semiconductor Corp.
Tokar Michael
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