Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-02-20
2007-02-20
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C710S054000, C710S310000, C711S129000, C711S170000
Reexamination Certificate
active
10041678
ABSTRACT:
In response to receiving a request to perform an enqueue or dequeue operation a corresponding queue descriptor specifying the structure of the queue is referenced to execute the operation. The queue descriptor is stored in a processor's memory controller logic.
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Bernstein Debra
Rosenbluth Mark B.
Wolrich Gilbert
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