Qualified burst cache for transfer of data between disparate clo

Details Qualified burst cache for transfer of data between disparate clo Qualified burst cache for transfer of data between disparate clo

1996-04-30

1999-04-27

Pan, Daniel H.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

39520063, 39520064, 395855, 395873, 711130, 711144, 711150, G06F 1328, G06F 13376, G06F 1382

Patent

active

058988890

ABSTRACT:
A qualified burst cache facilitates burst mode data transfer between a first clock domain and a second clock domain by simplifying cache control structures. A cache is marked as qualified when full or there is no more data to be written to the cache, allowing burst data to be transferred out of said cache. The invention has applications in network adapter cards for transferring data between a host system bus and a network where the bus and network operate at different speeds and are therefore part of different clock domains.

REFERENCES:
patent: 4447873 (1984-05-01), Price et al.
patent: 5029124 (1991-07-01), Leahy et al.
patent: 5163132 (1992-11-01), Du Lac et al.
patent: 5412782 (1995-05-01), Hausman et al.
patent: 5469545 (1995-11-01), Vanbuskirk et al.
patent: 5499384 (1996-03-01), Lentz et al.
patent: 5579503 (1996-11-01), Osborne
patent: 5644729 (1997-07-01), Amini et al.

Affiliated with

Also associated with

Rating

Qualified burst cache for transfer of data between disparate clo does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Qualified burst cache for transfer of data between disparate clo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Qualified burst cache for transfer of data between disparate clo will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-692926