Quad state logic design methods, circuits, and systems

Details Quad state logic design methods, circuits, and systems Quad state logic design methods, circuits, and systems

2005-11-08

2005-11-08

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Three or more active levels

C326S060000, C326S112000

Reexamination Certificate

active

06963225

ABSTRACT:
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring interconnects between memories and logic elements results in higher speed, higher density, and lower power integrated circuit designs.

REFERENCES:
patent: 5559734 (1996-09-01), Saito
patent: 5652536 (1997-07-01), Nookala et al.
patent: 6133754 (2000-10-01), Olson
patent: 6433586 (2002-08-01), Ooishi

Affiliated with

Also associated with

Rating

Quad state logic design methods, circuits, and systems does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Quad state logic design methods, circuits, and systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Quad state logic design methods, circuits, and systems will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3513384