Quad flat no lead (QFN) grid array package, method of making...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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C438S123000, C438S124000, C438S127000, C438S690000, C438S693000, C438S759000, C438S940000, C438S977000

Reexamination Certificate

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06967125

ABSTRACT:
A quad flat no-lead (QFN) grid array semiconductor package and method for making the same is disclosed. The package includes a semiconductor die and a lead frame having a plurality of conductive elements patterned in a grid-type array. A plurality of bond pads on the semiconductor die is coupled to the plurality of conductive elements, such as by wire bonding. The semiconductor die and at least a portion of the lead frame are encapsulated in an insulative material, leaving the conductive elements exposed along a bottom major surface of the package for subsequent electrical connection with higher-level packaging. Individual conductive lead elements, as well as the grid array pattern, are formed by wire bonding multiple bond pads to a single lead at different locations and subsequently severing the lead between the bonding locations to form multiple conductive elements from each individual lead.

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Australian Search Report dated Sep. 8, 2004, 4 pages.

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