Punch-through field effect transistor

Details Punch-through field effect transistor Punch-through field effect transistor

1995-03-31

1997-01-07

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257342, H01L 2978

Patent

active

055920055

ABSTRACT:
A trenched field effect transistor suitable especially for low voltage power applications provides low leakage blocking capability due to a gate controlled barrier region between the source region and drain region. Forward conduction occurs through an inversion region between the source region and drain region. Blocking is achieved by a gate controlled depletion barrier. Located between the source and drain regions is a fairly lightly doped body region. The gate electrode, located in a trench, extends through the source and body regions and in some cases into the upper portion of the drain region. The dopant type of the polysilicon gate electrode is the same type as that of the body region. The body region is a relatively thin and lightly doped epitaxial layer grown upon a highly doped low resistivity substrate of opposite conductivity type. In the blocking state the epitaxial body region is depleted due to applied drain-source voltage, hence a punch-through type condition occurs vertically. Lateral gate control increases the effective barrier to the majority carrier flow and reduces leakage current to acceptably low levels.

REFERENCES:
patent: 4633292 (1986-12-01), Fellinger et al.
patent: 5023196 (1991-06-01), Johnsen et al.
patent: 5082795 (1992-01-01), Temple
patent: 5298442 (1994-03-01), Bulucea et al.
patent: 5316959 (1994-05-01), Kwan et al.
patent: 5349224 (1994-09-01), Gilbert et al.
patent: 5378911 (1995-01-01), Murakami
patent: 5405794 (1995-04-01), Kim
patent: 5430315 (1995-07-01), Rumennik
patent: 5468982 (1995-11-01), Hshieh et al.
Mader, H., "Electrical Properties of Bulk-Barrier Diodes," IEEE Transactions on Electron Devices, vol. ED-29, No. 11, Nov. 1982, pp. 1766-1771.
Mader, H., et al., "Bulk-Barrier Transistor," IEEE Transactions on Electron Devices, vol. ED-30, No. 10, Oct. 1983, pp. 1380-1386.
McCowen, A., et al., "Gate controlled bulk-barrier mechanism in an MOS power transistor," IEEE Proceedings, vol. 134, Pt. I, No. 6, Dec. 1987, pp. 165-169.
Baliga, B., et al., "The Accumulation-Mode Field-Effect Transistor: A New Ultralow On-Resistance MOSFET," IEEE Electron Device Letters, vol. 13, No. 8, Aug. 1992, pp. 427-429.
Syau, T., et al., "Comparison of Ultralow Specific On-Resistance UMOSFET Structures: The ACCUFET, EXTFET, INVFET, and Conventional UMOSFET's," IEEE Transactions on Electron Devices, vol. 41, No. 5, May 1994, pp. 800-808.

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