Pulse-width limited chip clock design

Details Pulse-width limited chip clock design Pulse-width limited chip clock design

2008-01-08

2008-01-08

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10616881

ABSTRACT:
A method and an apparatus are provided for limiting a pulse width in a chip clock design of a circuit. The circuit receives a clock signal having a clock pulse width. The clock pulse width of the clock signal is detected. It is determined whether the clock pulse width is larger than a maximum clock pulse width. Upon a determination that the clock pulse width is larger than a maximum clock pulse width, the clock pulse width of the clock signal is limited.

REFERENCES:
patent: 5535337 (1996-07-01), Hogan et al.
patent: 6704908 (2004-03-01), Horan et al.

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