Static information storage and retrieval – Addressing
Patent
1998-07-06
1999-10-26
Fears, Terrell W.
Static information storage and retrieval
Addressing
365 76, G11C 1300
Patent
active
059739827
ABSTRACT:
Disclosed herein is an ATD circuit of the present invention. In order to generate a stable ATD pulse, a pulse width amplifier circuit is provided between a first circuit means and a second circuit means. The first circuit means outputs a first output signal having a first pulse width in response to a change in external address signal and outputs, when the external address signal is brought to a first sawtooth signal, a second sawtooth output signal having a peak value smaller than that of the first sawtooth signal. The second circuit means inputs therein the signal outputted from the pulse width amplifier circuit and waveform-shapes the output signal so as to output an ATD signal therefrom. The pulse width amplifier circuit amplifies a pulse width of the signal outputted from the first circuit means. Further, the pulse width amplifier circuit outputs a third output signal having a second pulse width corresponding to the first pulse width when the first output signal is input thereto and outputs a fourth output signal having a third pulse width when the second output signal is input thereto.
REFERENCES:
patent: 5329188 (1994-07-01), Sikkink et al.
patent: 5566129 (1996-10-01), Nakashima et al.
patent: 5625604 (1997-04-01), Kim et al.
patent: 5638016 (1997-06-01), Eitheim
patent: 5646565 (1997-07-01), Tukidate
Fukudome Kazukiyo
Suyama Junichi
Fears Terrell W.
OKI Electric Industry Co., Ltd.
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