Pulse-based high speed flop circuit

Details Pulse-based high speed flop circuit Pulse-based high speed flop circuit

2000-08-14

2002-08-13

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S208000, C327S210000, C327S218000, C327S259000

Reexamination Certificate

active

06433603

ABSTRACT:

BACKGROUND OF THE INVENTION
A flip-flop is a 1-bit storage element that is commonly used in electronic circuits. The flip-flop is typically used to synchronize timing in a circuit and is one of the most frequently used circuits for reliably sampling and storing data. Accordingly, the flip-flop is a fundamental element of semiconductor circuits that have a single-phase clock.
Various types and structures of flip-flops have been employed in integrated circuits for many years. A flip-flop is a circuit element that greatly determines the overall clocking speed, thus the operating speed, of a processor or controller.
FIG. 1
shows a timing diagram of a circuit such as a processor. The timing diagram includes a plurality of timing cycles. A timing cycle has several time segments that relate to functionality of timed circuits. For example, a flip-flop operates according to a timing cycle that includes a setup time T
S
and a propagation time T
P
that, in combination, determine a time penalty that arises from operation of the flip-flop. The setup time T
S
is the time duration that data must be applied to the flip-flop before the flip-flop is ready to store the data. The propagation time T
P
is the time duration to propagate the data through the flip-flop to computation logic.
Hold time T
H
is a time segment that expresses the time duration the data must be stable after the clock arrives so that computations are made on the correct data value. The hold time T
H
is a limitation on system accuracy rather than expressing a limitation on operating speed. Accordingly, the hold time T
H
is an implementation hazard rather than a time hazard.
Computation time T
C
is the time duration that is available for logic to perform computations. The computation time T
C
is theoretically equal to the clock cycle time minus the sum of setup time T
S
and propagation time T
P
. To increase computation time T
C
and/or to increase operating speed, setup time T
S
or propagation time T
P
must be reduced.
Many attempts have been made to design faster flip-flops, for example where the sum of the setup time T
S
and propagation time T
P
is small and hold time T
H
is at a minimum, and more reliable flip-flops in the semiconductor industry, particularly in microprocessor designs.
What is needed is a flip-flop circuit that increases operating speed of the processor.
SUMMARY
An integrated circuit device for synchronization of data in a data path includes a driver and a storage element coupled to the driver for driving the storage element. The storage element is coupled to the data path outside the data path.
The integrated circuit employs a method of operation including passing a time pulse, sampling data during the time pulse, passing the data to a computation logic along a data path, and storing the sampled data in a storage element connected to but outside the data path.
In accordance with an aspect of usage of the integrated circuit device, a processor includes a control logic for executing computational and logic operations and a memory coupled to the control logic. The control logic and the memory include a plurality of flip-flops for synchronization of data in a data path. The flip-flops include a driver and a storage element coupled to the driver, the driver for driving the storage element, the storage element being coupled to the data path outside the data path.


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Notification of Transmittal of the International Search Report or the Declaration and International Search Report, mailed Jul. 3, 2002; International Application No. PCT/US01/25553; filed Aug. 14, 2001; Applicant—Sun Microsystems, Inc.; 7 pages.

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