Pull-down circuit for wide voltage operation

Details Pull-down circuit for wide voltage operation Pull-down circuit for wide voltage operation

1993-12-28

1995-05-30

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327434, 327208, 327306, 365190, H03K 17687, H03L 500

Patent

active

054205336

ABSTRACT:
A pull-down circuit for wide voltage operation including a ninth N-MOS transistor and a tenth N-MOS transistor each having a drain electrode connected to a data line and a source electrode grounded, an eleventh N-MOS transistor and a twelfth N-MOS transistor connected to each other in series between gates of the ninth and tenth N-MOS transistors and an output of a controller for controlling the pull-down circuit, each of the eleventh and twelfth N-MOS transistors having a gate electrode and a drain electrode connected with each other, and a thirteenth N-MOS transistor having a gate electrode adapted to receive a signal from the controller, a drain electrode connected to a source electrode of the twelfth N-MOS transistor, and a source electrode grounded. The pull-down circuit performs a pull-down operation at a voltage level of above 3 V and does not perform the pull-down operation at a voltage level of 3 V or below.

REFERENCES:
patent: 3942039 (1976-03-01), Kikuchi et al.
patent: 5289415 (1994-02-01), Dimarco et al.
patent: 5305264 (1994-04-01), Takahashi
patent: 5338978 (1994-08-01), Larsen et al.
patent: 5341045 (1994-08-01), Almulla

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