Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2005-11-22
2005-11-22
Phan, Trong (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S233100, C365S233500
Reexamination Certificate
active
06967886
ABSTRACT:
A data refresh method of a pseudo static random access memory is implemented by the following procedure. First, an address string and a refresh signal are provided, in which the address string is used for the reference of data reading and writing positions. Secondly, within at least one address of the address string, the active time of a word line of the PSRAM is set to be equivalent to or less than a half of the period of the refresh signal. Then, refreshing performs while the word line is off, and reading and writing are performed while the word line is active. If writing is requested while the word line is off, the writing will be performed when an address transition detection signal ATD switches to the high level in the next address.
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patent: 6813212 (2004-11-01), Takahashi et al.
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Chang Chien Yi
Huang Pei Jey
Egbert Law Offices
Elite Semiconductor Memory Technology Inc.
Phan Trong
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