Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1989-01-30
1991-07-16
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Data refresh
365194, G11C 700
Patent
active
050330268
ABSTRACT:
A pseudo-static RAM device is disclosed which operates at high speed in the reading or writing mode and permits a long refreshing period in the self-refreshing mode. In the pseudo-static RAM of the present invention, an activation signal for enabling the sense amplifiers is generated with a variable delay time, from a time point when a designated word line is driven. The delay time is switched in response to a control signal representing the self-refreshing mode to be long enough to transfer 100% of the amount of information stored in the designated driven memory cell to the bit line connected thereto, and is maintained short when the control signal representing the self-refreshing mode is not present.
REFERENCES:
patent: 4581718 (1986-04-01), Oishi
NEC Corporation
Popek Joseph A.
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