Pseudo hybrid structure for low K interconnect integration

Details Pseudo hybrid structure for low K interconnect integration Pseudo hybrid structure for low K interconnect integration

2011-06-07

2011-06-07

Lindsay, Jr., Walter L (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S624000, C257SE21498, C257SE21579

Reexamination Certificate

active

07955968

ABSTRACT:
A method and apparatus are described for fabricating an ultra low-k interconnect structure by depositing and curing a first via layer (43) of ultra low dielectric constant (ULK) material, depositing a second uncured trench layer (51) of the same ULK material, selectively etching a via opening (62) and trench opening (72) with a dual damascene etch process which uses a trench etch end point signal from the chemical differences between uncured trench layer (51) and the underlying cured via layer (43), and then curing the second trench layer (83) before forming an interconnect structure (91) by filling the trench opening (72) and via opening (62) with an interconnection material so that there is no additional interface or higher dielectric constant material left behind.

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