Electrical computers and digital processing systems: memory – Address formation – Operand address generation
Reexamination Certificate
2008-08-15
2011-11-15
Choe, Yong (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Operand address generation
C711S154000, C711SE12001, C712S022000
Reexamination Certificate
active
08060724
ABSTRACT:
Executing a first memory access instruction with update by an N-bit processor includes accessing at least one source register of a plurality of registers, wherein the accessing includes accessing a first register, wherein each register of the plurality of registers includes a main portion of N bits and an extension portion of M bits, wherein the main portion of the first register includes a first address operand. The execution of the first instruction further includes forming a memory access address using the first address operand; using the memory access address as an address for a memory access; producing an updated address operand; and writing the updated address operand to the main portion of the first register. The producing includes accessing an extension portion of a source register of the at least one source register to obtain modifying information and using the modifying information in the producing an updated address operand.
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PCT/US2009/045379 International Search Report and Written Opinion mailed Dec. 29, 2009 on Corresponding Application.
U.S. Appl. No. 12/164,444, filed Jun. 30, 2008.
Chiu Joanna G.
Choe Yong
Dolezal David G.
Freescale Semiconductor Inc.
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