Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
2007-10-02
2007-10-02
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C713S500000, C713S501000, C713S502000, C713S503000, C713S601000
Reexamination Certificate
active
10269726
ABSTRACT:
A method for operating a device (such as a printer) having a first interface (such as USB interface) connectable to a first computer and a second interface (such as an Ethernet interface) connectable to a second computer. A phase lock loop (PLL) circuit is obtained which is driven by a clock source, which is adapted for switching between operating at the first and second clock frequencies, and which is operatively connected to the first and second interfaces to provide a clock signal to the first and second interfaces. The PLL circuit is operated at the first clock frequency when the first interface is active and is operated at the second clock frequency when the second interface is active. A device includes the first and second interfaces, the PLL circuit, and the clock source.
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Douglas John W.
Gardiner Samuel W.
Henry Darrel L.
Moore, Jr. Jimmy D.
Norris Duane E.
Lexmark International Inc.
Perveen Rehana
Sugent James F
Thompson Hine LLP
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