Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2002-08-12
2011-10-18
Smoot, Stephen W (Department: 2813)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S017000, C257S048000, C257SE21521, C257SE21522, C257SE21523, C257SE21529, C257S053000
Reexamination Certificate
active
08039277
ABSTRACT:
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1240) having a substrate (1240), at least one active layer (1240) and at least one surface layer (1240), Current control can be achieved through the formation of patterns (1240) surrounding contacts (1215), said patterns (1240) including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (1215). Current flows through active regions (1260) associated with said contacts (1215) and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
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Biard James R.
Guenter James K.
Haji-Sheikh Michael J.
Hawkins Bobby M.
Booker Vicki B
Finisar Corporation
Maschoff Gilmore & Israelsen
Smoot Stephen W
LandOfFree
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