Providing accurate time-based counters for scaling operating...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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C375S354000, C709S248000

Reexamination Certificate

active

07602874

ABSTRACT:
A mechanism provides accurate time-based counters for scaling operating frequencies of microprocessors. The mechanism makes use of a time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.

REFERENCES:
patent: 5721888 (1998-02-01), Miller et al.
patent: 6239635 (2001-05-01), Matsuzaki
patent: 2005/0083087 (2005-04-01), DeMent et al.
patent: 2005/0163273 (2005-07-01), Scheffel
patent: 2008/0226008 (2008-09-01), Hilgendorf et al.

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