Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing extended or expanded memory
Reexamination Certificate
2000-02-08
2002-11-05
Robertson, David L. (Department: 2187)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Addressing extended or expanded memory
C711S206000
Reexamination Certificate
active
06477612
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to computer systems, and more particularly to managing computer system memory.
BACKGROUND OF THE INVENTION
In contemporary operating systems such as Microsoft Corporation's Windows® 2000 operating system, applications are provided with thirty-two bit virtual addressing, which allows up to four gigabytes to be addressed even if the system has less than four gigabytes of physical memory. The operating system reserves two gigabytes of virtual memory for itself, although in one recent improvement, the operating system can be configured to use only one gigabyte of virtual memory. This leaves applications with two gigabytes (or in some cases three gigabytes) of directly addressable memory. While at one time this matched the maximum amount of memory that a processor could physically address, contemporary thirty-two-bit processors are now able to physically address up to sixty-four gigabytes of memory.
While four gigabytes is suitable for many applications, some applications need to be able to access huge amounts of data at a high speed. For example, a large database may contain many gigabytes of records that a database application may need to access. Disk swapping in and out with a two-gigabyte or three-gigabyte cache works, but is very slow and thus undesirable. Using the full amount of available (e.g., up to sixty-four gigabytes) random access memory (RAM) for the database data is far faster and thus desirable.
Using memory segmenting (in a similar manner to segmenting in 286 processors and below) is not an adequate solution for addressing increased amounts of memory, because such segmenting would be directed to relatively large segments of memory, having a size that is based on the total size available divided by the addressable space. For example, 640-kilobytes of memory provided ten 64-kilobyte segments. Such a coarse granularity is not very effective in many applications, including data caching operations.
One solution to utilizing larger amounts of RAM is referred to as the PSE-36 method. With this method, however, applications need to be rewritten and/or the memory partitioned into ramdisks (sections of memory that appear to be disk drives but are actually in RAM) to obtain a performance benefit, which is not always apparent. Moreover, PSE-36 operates by copying frames of information into thirty-two-bit application addressable space so that the application can access the information, and any copying operation costs processor, cache, bus and memory cycles.
SUMMARY OF THE INVENTION
Briefly, the present invention provides a method and system for enabling applications to access an increased amount of physical memory via an extension to virtual memory addressing. APIs are provided in a memory management component of an operating system, to enable an application to request allocation of special amounts of virtual memory that are capable of being remapped to pages of physical memory, to request allocation of physical memory, and to control the mapping therebetween. The mapping may be to a fine granularity, as little as a single page in virtual memory mapped to a single page in physical memory. An API is also provided to free physical memory. The memory manager records the mappings in a table, which are then used in a processor's translation buffer to point a given virtual address to a mapped-to page of physical memory.
The memory manager includes a number of mechanisms to ensure that fast mapping (and remapping), cross-process security and coherency across multiple processors in a multiprocessor system is provided. One such mechanism includes a special per-process linked list which (at present) contains only window-supporting views. When remap-capable virtual memory is allocated to a process, the memory manager adds an entry for it to the linked list. Upon a remap request, the linked list is evaluated by the memory manager to rapidly verify that the requesting process has specified a range of virtual memory that is capable of being mapped. Another mechanism comprises a bitmap representing the physical pages that are currently allocated to a process, which is maintained and used by the memory manager to rapidly determine whether a physical page (to which the process has requested to map a virtual address) is currently allocated to that process. This provides the security, in that one process cannot access data belonging to another process or the system itself. Additionally, by using the bitmap index as an index into the system-wide page frame number database the memory manager can rapidly determine whether the requested physical page is already mapped, which is not allowed. Lastly, the memory manager checks to determine whether a virtual address for which a mapping operation is being requested is already mapped to another physical page, and if so, the memory manager invalidates the existing mapping before remapping the virtual address to the new page. The invalidation includes invalidating (e.g., removing) mapping information from the processor's translation buffer. In a multiprocessor system, the invalidation is performed as needed across multiple processors, thereby ensuring data coherency. For improved performance, the invalidation of multiple mappings is typically performed in a single batched operation on each processor, whereby each processor only needs to be interrupted once to perform the invalidations.
When the mappings are present and an application accesses an address in a mapped range in virtual memory, (e.g., via a thirty-two bit address), the processor uses the mapping information in its translation buffer (obtained via the memory manager) to access the corresponding page pointed to in the physical memory. The requested byte on the mapped-to page is accessed according to the byte index of the virtual memory address. The process can rapidly remap virtual memory addresses to other physical pages allocated to that process, thereby enabling access to larger amounts of memory via a virtual address, essentially by adjusting a pointer in a straightforward manner, and without copying of the data.
REFERENCES:
The Waite Group's MS-DOS Papers for MS-DOS Developers and Power Users, 1988, pp. 535-562.
Law Offices of Albert S. Michalik PLLC
Microsoft Corporation
Robertson David L.
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