Protocol processor intended for the execution of a collection of

Boots – shoes – and leggings

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395476, 395477, 395381, 395384, 395391, 395562, 395567, 395571, 395581, 364375, 364703, 36471508, 364736, G06F 1500

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057404585

ABSTRACT:
Protocol processor intended to be associated with at least one main processor of a system with a view to the execution of tasks to which the main processor is not suited. The protocol processor comprises a program part (30) including an incrementation register (31), a program memory (33) connected to the incrementation register (31) in order to receive addresses thereof, a decoding part (35) intended to receive instructions from the program memory (33) of the program part (30) with a view to executing an instruction in two cycles, and a data part (36) for executing the instruction.

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patent: 5179530 (1993-01-01), Genusov et al.
patent: 5187796 (1993-02-01), Wang et al.
"Interface Arrangement Suits Digital Processor to Multiprocessing", Magur etal.; Electronic Design vol. 33, No. 5, Hasbrouck Heights, NJ, USA pp. 189-198; Mar. 1985.
"Increasing system Performance Using Coprocessors", Krelle, Wescon Tech. Papers, Anaheim, CA pp. 1-6, Oct. 30, 1984.
"Second Generation DSP Expands Into New Domains", Marven, New Electronics, vol. 18, No. 17, London, GB, pp. 30,33,34 & 37 Sep. 1985.

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