Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-08-29
2009-02-24
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S437000, C438S761000, C438S763000, C438S788000, C257SE21549, C257SE21267
Reexamination Certificate
active
07494894
ABSTRACT:
A method including, prior to a plasma heat-up operation, forming a liner on a structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.
REFERENCES:
patent: 5956612 (1999-09-01), Elliott et al.
patent: 6033970 (2000-03-01), Park
patent: 6037018 (2000-03-01), Jang et al.
patent: 6093618 (2000-07-01), Chen et al.
patent: 6121134 (2000-09-01), Burton et al.
patent: 6146974 (2000-11-01), Liu et al.
patent: 6174785 (2001-01-01), Parekh et al.
patent: 6200911 (2001-03-01), Narwankar et al.
patent: 6204171 (2001-03-01), Hu
patent: 6204172 (2001-03-01), Marsh
patent: 6218288 (2001-04-01), Li et al.
patent: 6251748 (2001-06-01), Tsai
patent: 6255194 (2001-07-01), Hong
patent: 6265282 (2001-07-01), Lane et al.
patent: 6281072 (2001-08-01), Li et al.
patent: 6297128 (2001-10-01), Kim et al.
patent: 6309975 (2001-10-01), Wu et al.
patent: 6316360 (2001-11-01), Burton et al.
patent: 6320261 (2001-11-01), Burton et al.
patent: 6323081 (2001-11-01), Marsh
patent: 6326282 (2001-12-01), Park et al.
patent: 6414364 (2002-07-01), Lane et al.
patent: 6461967 (2002-10-01), Wu et al.
patent: 6489199 (2002-12-01), Li et al.
patent: 6495921 (2002-12-01), Burton et al.
patent: 6544871 (2003-04-01), Honeycutt
patent: 6596642 (2003-07-01), Wu et al.
patent: 6596648 (2003-07-01), Wu et al.
patent: 6599840 (2003-07-01), Wu et al.
patent: 6617689 (2003-09-01), Honeycutt
patent: 6690094 (2004-02-01), Burton et al.
patent: 6713350 (2004-03-01), Rudeck
patent: 6720638 (2004-04-01), Tran
patent: 6724089 (2004-04-01), Trivedi et al.
patent: 2001/0039092 (2001-11-01), Morimoto et al.
patent: 2002/0008270 (2002-01-01), Marsh
patent: 2002/0045325 (2002-04-01), Kuhn et al.
patent: 2002/0064970 (2002-05-01), Chooi et al.
patent: 2002/0068394 (2002-06-01), Tokushige et al.
patent: 2002/0076900 (2002-06-01), Park et al.
patent: 2002/0109233 (2002-08-01), Farrar
patent: 2002/0109235 (2002-08-01), Leiphart
patent: 2002/0142550 (2002-10-01), Kumamoto
patent: 2004/0070916 (2004-04-01), Tsuruta et al.
Budge William
Li Weimin
Rueger Neal R.
Fourson George
Micro)n Technology, Inc.
Schwegman Lundberg & Woessner, P.A.
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