Protection in integrated circuits

Details Protection in integrated circuits Protection in integrated circuits

2006-07-17

2009-12-15

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S437000, C257SE21546

Reexamination Certificate

active

07632737

ABSTRACT:
A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.

REFERENCES:
patent: 5956612 (1999-09-01), Elliott et al.
patent: 6033970 (2000-03-01), Park
patent: 6037018 (2000-03-01), Jang et al.
patent: 6093618 (2000-07-01), Chen et al.
patent: 6121134 (2000-09-01), Burton et al.
patent: 6146974 (2000-11-01), Liu et al.
patent: 6174785 (2001-01-01), Parekh et al.
patent: 6200911 (2001-03-01), Narwankar et al.
patent: 6204171 (2001-03-01), Hu
patent: 6204172 (2001-03-01), Marsh
patent: 6218288 (2001-04-01), Li et al.
patent: 6251748 (2001-06-01), Tsai
patent: 6255194 (2001-07-01), Hong
patent: 6265282 (2001-07-01), Lane et al.
patent: 6281072 (2001-08-01), Li et al.
patent: 6297128 (2001-10-01), Kim et al.
patent: 6309975 (2001-10-01), Wu et al.
patent: 6316360 (2001-11-01), Burton et al.
patent: 6320261 (2001-11-01), Burton et al.
patent: 6323081 (2001-11-01), Marsh
patent: 6326282 (2001-12-01), Park et al.
patent: 6414364 (2002-07-01), Lane et al.
patent: 6461967 (2002-10-01), Wu et al.
patent: 6489199 (2002-12-01), Li et al.
patent: 6495921 (2002-12-01), Burton et al.
patent: 6544871 (2003-04-01), Honeycutt
patent: 6596642 (2003-07-01), Ma et al.
patent: 6596648 (2003-07-01), Wu et al.
patent: 6599840 (2003-07-01), Wu et al.
patent: 6617689 (2003-09-01), Honeycutt
patent: 6690094 (2004-02-01), Burton et al.
patent: 6713350 (2004-03-01), Rudeck
patent: 6720638 (2004-04-01), Tran
patent: 6724089 (2004-04-01), Trivedi et al.
patent: 7494894 (2009-02-01), Rueger et al.
patent: 2001/0039092 (2001-11-01), Morimoto et al.
patent: 2002/0008270 (2002-01-01), Marsh
patent: 2002/0045325 (2002-04-01), Kuhn et al.
patent: 2002/0064970 (2002-05-01), Chooi et al.
patent: 2002/0076900 (2002-06-01), Park et al.
patent: 2002/0109233 (2002-08-01), Farrar
patent: 2002/0109235 (2002-08-01), Leiphart
patent: 2002/0142550 (2002-10-01), Kumamoto
patent: 2004/0070916 (2004-04-01), Tsuruta et al.
U.S. Appl. No. 10/231,388, Non Final Office Action mailed Oct. 9, 2003, 6 pgs.
U.S. Appl. No. 10/231,388, Response filed Jan. 9, 2004 to Non Final Office Action mailed Oct. 9, 2003, 16 pgs.
U.S. Appl. No. 10/231,388, Final Office Action mailed Apr. 21, 2004, 5 pgs.
U.S. Appl. No. 10/231,388, Response filed Jul. 15, 2004 to Final Office Action mailed Apr. 21, 2004, 6 pgs.
U.S. Appl. No. 10/231,388, Non Final Office Action mailed Oct. 6, 2004, 5 pgs.
U.S. Appl. No. 10/231,388, Response filed Mar. 25, 2005 to Non Final Office Action mailed Oct. 6, 2004, 15 pgs.
U.S. Appl. No. 10/231,388, Non Final Office Action mailed Jun. 8, 2005, 5 pgs.
U.S. Appl. No. 10/231,388, Response filed Sep. 8, 2005 to Non Final Office Action mailed Jun. 8, 2005, 16 pgs.
U.S. Appl. No. 10/231,388, Final Office Action mailed Nov. 28, 2005, 7 pgs.
U.S. Appl. No. 10/231,388, Response filed Jan. 30, 2006 to Final Office Action mailed Nov. 28, 2005, 10 pgs.
U.S. Appl. No. 10/231,388, Advisory Action mailed Mar. 15, 2006, 2 pgs.
U.S. Appl. No. 10/231,388, Response filed Mar. 28, 2006 to Advisory Action mailed Mar. 15, 2006, 3 pgs.
U.S. Appl. No. 10/231,388, Notice of Non-Compliant Amendment mailed Jun. 14, 2006, 3 pgs.
U.S. Appl. No. 10/231,388, Response filed Jul. 13, 2006 to Notice of Non-Compliant Amendment mailed Jun. 14, 2006, 6 pgs.
U.S. Appl. No. 10/231,388, Non Final Office Action mailed Oct. 11, 2006, 7 pgs.
U.S. Appl. No. 10/231,388, Response filed Dec. 11, 2006 to Non Final Office Action mailed Oct. 11, 2006, 9 pgs.
U.S. Appl. No. 10/231,388, Final Office Action mailed Mar. 2, 2007, 6 pgs.
U.S. Appl. No. 10/231,388, Response filed Apr. 12, 2007 to Final Office Action mailed Mar. 2, 2007, 11 pgs.
U.S. Appl. No. 10/231,388, Advisory Action mailed Apr. 30, 2007, 3 pgs.
U.S. Appl. No. 10/231,388, Response filed May 30, 2007 to the Final Office Action mailed Mar. 2, 2007 and the Advisory Action mailed Apr. 30, 2007, 12 pgs.
U.S. Appl. No. 10/231,388, Non Final Office Action mailed Aug. 8, 2007, 6 pgs.
Non-Final Office Action mailed Aug. 8, 2007in U.S. Appl. No. 10/231,388, 6.
U.S. Appl. No. 10/231,388 Response filed Nov. 1, 2007 to Non-Final Office Action mailed Aug. 8, 2007, 10 pgs.
U.S. Appl. No. 10/231,388, Response filed Nov. 1, 2007 to Non Final Office Action mailed Aug. 8, 2007, 10 pgs.
U.S. Appl. No. 10/231,388, Final Office Action mailed Feb. 8, 2008, 4 pgs.

Affiliated with

Also associated with

Rating

Protection in integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Protection in integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Protection in integrated circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4058145