Protection for memory modification tracking

Details Protection for memory modification tracking Protection for memory modification tracking

2005-12-27

2005-12-27

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S006130, C711S144000

Reexamination Certificate

active

06981172

ABSTRACT:
A dirty memory is operable to store dirty indicators, each dirty indicator being settable to a given value indicative that a page of memory associated therewith has been dirtied. The dirty indicators are stored in groups with each group having associated therewith a validity indicator computed from the dirty indicator values of the group. The control logic is operable on reading a group to compute a validity indicator value based on the dirty indicator values for the group to determine the integrity of the group. The integrity can be confirmed by comparing the computed validity indicator value to a validity indicator value read for the group. Where the value read and the value computed compare equal, it can be assumed that the dirty indicator values of the group are correct. Preferably the validity indicator is a parity indicator. Although parity does not provide for error correction, parity has the advantage that minimal overhead is needed for computation and storage. When a parity error is detected, all of the dirty indicators associated with the parity indicator that has flagged a potential error are treated as suspect. As a consequence, when a parity error is detected for a of dirty indicators, all of the pages of memory associated with those dirty indicators are treated as being dirtied and they are therefore copied between memories. The dirty indicators and the parity indicator are then reset.

REFERENCES:
patent: 5519831 (1996-05-01), Holzhammer
patent: 5557622 (1996-09-01), Hassoun et al.
patent: 5627965 (1997-05-01), Liddell et al.
patent: 5692154 (1997-11-01), Tucker et al.
patent: 5790776 (1998-08-01), Sonnier et al.
patent: 5838894 (1998-11-01), Horst
patent: 5953742 (1999-09-01), Williams
patent: 5974512 (1999-10-01), Chiba
patent: 6047392 (2000-04-01), Liddell et al.
patent: 6151689 (2000-11-01), Garcia et al.
patent: 6233702 (2001-05-01), Horst et al.
patent: 6260159 (2001-07-01), Garnett et al.
patent: 6496940 (2002-12-01), Horst et al.
patent: 6622219 (2003-09-01), Tremblay et al.
patent: 6640287 (2003-10-01), Gharachorloo et al.
patent: 6782453 (2004-08-01), Keltcher et al.
patent: 6785763 (2004-08-01), Garnett et al.
patent: 6785777 (2004-08-01), Garnett et al.
patent: 2002/0065986 (2002-05-01), Garnett et al.
patent: 2002/0065996 (2002-05-01), Garnett et al.
The Authoritative Dictionary of IEEE Standards Terms, 2000, IEEE Press, Seventh Edition, pp. 794 and 1283.
UK Combined Search and Examination Report, application No. GB0029107.0, filed Nov. 29, 2000.

Affiliated with

Also associated with

Rating

Protection for memory modification tracking does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Protection for memory modification tracking, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Protection for memory modification tracking will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3485633