Protection domains in a single address space

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Details

711145, G06F 1214

Patent

active

058451293

ABSTRACT:
Protection among threads executing in the same address space of a computer system is provided without using virtual memory techniques. This is achieved by grouping the threads into protection domains, each of the threads in a protection domain having the same rights to access memory as the other threads in that protection domain, so that each thread in a protection domain can access all the information available to the others. At least one protection domain, referred to herein as the "system" domain, which typically is the protection domain of the operating system and has unrestricted access to the entire memory, is predefined prior to execution of any threads. Prior to execution, the single address space is divided into non-overlapping pages. Each page has at least one access permission set for it. Only threads that belong to a protection domain having permission to access a page may do so. During operation, when a request to access memory is issued by an executing thread, it is determined whether or not the protection domain of the executing thread has permission to perform the requested type of access. If the protection domain of the executing thread is permitted to perform the type of access requested, access is granted and the executing thread's execution proceeds normally. However, if the protection domain of the executing thread does not have permission to perform the requested type of access, a protection fault is generated.

REFERENCES:
patent: 5280614 (1994-01-01), Munroe
patent: 5390310 (1995-02-01), Welland
patent: 5581722 (1996-12-01), Welland
Intel 1486 Microprocessor Technical Report.
"SPARC Reference MMU Architecture" Sun Microsystems, Version 8, Dec. 11, 1990.
"Structured Computer Organization" A.S. Tanenbaum, 1984, Prentice Hall, Inc. Englewood Cliffs, NJ, pp. 308-341.

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