Protection circuit with clamping feature for semiconductor devic

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257360, 257363, 361 91, H01L 2362, H02H 320

Patent

active

060640936

ABSTRACT:
In order to protect an internal circuit from high voltages caused by static electricity applied to a pad of a semiconductor device, a protection circuit is configured of a clamping circuit portion (6) utilizing a MISFET (5) connected between the pad (10) and the internal circuit (3) and a gate circuit portion (8) connected to the clamping circuit portion (6). The source and bulk terminals of the MISFET (5) of the clamping circuit portion (6) are connected to the pad (10) and the internal circuit (3), the drain thereof is connected to a first power supply terminal (11), the gate thereof is connected to one terminal of a gate circuit resistor (15) and one terminal of a capacitor (16) constituting the gate circuit portion (8), the other terminal of the gate circuit resistor (15) is connected to a second power supply terminal (12), and the other terminal of the capacitor (16) is connected to the first power supply terminal (11). As a result, surge voltages of positive and negative polarity caused by static electricity can be clamped at a low voltage by a single clamping element (MISFET) per pad.

REFERENCES:
patent: 4736271 (1988-04-01), Mack et al.
patent: 4858055 (1989-08-01), Okitaka
patent: 5047820 (1991-09-01), Garnett

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