Protection circuit for semiconductor devices

Details Protection circuit for semiconductor devices Protection circuit for semiconductor devices

1997-12-22

2000-04-04

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257360, 257546, H01L 2362, H01L 2900

Patent

active

060464801

ABSTRACT:
An object is to realize a protection circuit for protecting a semiconductor device from an ESD or other surge, said protection circuit having its improved reliability with a reduced scale of circuit. An n-type diffusion region (second diffusion region) is formed on a p-type well. A diode D1 formed by the n-type diffusion region and p-type well is connected to the gate electrode of n-type transistor. Thus, the potential difference between a channel region and the gate electrode is reduced to protect the gate oxide film. The n-type diffusion region is formed in the region of the gate electrode on the side of a source region between the source region and a p-type diffusion region (second diffusion region). The layout is determined such that a bipolar formed by the drain region, p-type well and n-type diffusion region will not be turned on. A single contact of minimum size is formed in the n-type diffusion region. When it is desired to form a silicide film, it may not overlap a device isolation film. The present invention may be applied to an output buffer, input buffer, input/output buffer, interface circuit between circuits operable in different power-supply systems or the like.

REFERENCES:
patent: 5945713 (1999-08-01), Voldman

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